{"id":192,"date":"2020-04-05T07:06:04","date_gmt":"2020-04-05T07:06:04","guid":{"rendered":"https:\/\/temp.ashkerala.com\/?p=192"},"modified":"2020-04-05T07:06:04","modified_gmt":"2020-04-05T07:06:04","slug":"computer-organization-mcq-3","status":"publish","type":"post","link":"https:\/\/temp.ashkerala.com\/?p=192","title":{"rendered":"Computer Organization MCQ -3"},"content":{"rendered":"<p><strong>Q.31\u00a0 Logic X-OR operation of (4ACO)_H &amp; (B53F)_H results<br \/> <em>_=Base<\/em><\/strong><br \/> \u00a0(A) AACB\u00a0 (B) 0000<br \/> \u00a0(C) FFFF\u00a0 (D) ABCD<br \/> \u00a0<br \/> <strong>\u00a0Ans: C<br \/> \u00a0<br \/> Q.32\u00a0 When CPU is executing a Program that is part of the Operating System, it is said to be in<\/strong><br \/> \u00a0(A) Interrupt mode\u00a0 (B) System mode<br \/> \u00a0(C) Half mode\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (D) Simplex mode<br \/> \u00a0<br \/> <strong>\u00a0Ans: B \u00a0<br \/> \u00a0<br \/> Q.33\u00a0 An n-bit microprocessor has<\/strong><br \/> \u00a0(A) n-bit program counter\u00a0 (B) n-bit address register<br \/> \u00a0(C) n-bit ALU\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (D) n-bit instruction register<br \/> \u00a0<br \/> <strong>\u00a0Ans: D<br \/> \u00a0<br \/> Q.34\u00a0 Cache memory works on the principle of<\/strong><br \/> \u00a0(A) Locality of data\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (B) Locality of memory<br \/> \u00a0(C) Locality of reference\u00a0 (D) Locality of reference &amp; memory<br \/> \u00a0<br \/> <strong>\u00a0Ans: C\u00a0\u00a0 \u00a0<br \/> \u00a0<br \/> Q.35\u00a0 The main memory in a Personal Computer (PC) is made of \u00a0<\/strong><br \/> \u00a0 (A)\u00a0 cache memory.\u00a0\u00a0\u00a0\u00a0 (B)\u00a0 static RAM<br \/> \u00a0 (C)\u00a0 Dynamic Ram\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (D)\u00a0 both (A) and (B).<br \/> \u00a0<br \/> <strong>\u00a0Ans: D<br \/> \u00a0<br \/> Q.36\u00a0 In computers, subtraction is carried out generally by <\/strong>\u00a0<br \/> \u00a0(A) 1&#8217;s complement method \u00a0<br \/> \u00a0(B) 2&#8217;s complement method<br \/> \u00a0(C) signed magnitude method<br \/> \u00a0(D) BCD subtraction method<br \/> \u00a0<br \/> <strong>\u00a0Ans: B<br \/> \u00a0<br \/> Q.37\u00a0 PSW is saved in stack when there is a<\/strong><br \/> \u00a0(A) interrupt recognised \u00a0<br \/> \u00a0(B) execution of RST instruction<br \/> \u00a0(C) Execution of CALL instruction<br \/> \u00a0(D) All of these<br \/> \u00a0<br \/> <strong>\u00a0Ans: A \u00a0<br \/> \u00a0<br \/> Q.38\u00a0 The multiplicand register &amp; multiplier register of a hardware circuit implementing booth&#8217;s algorithm have (11101) &amp; (1100).\u00a0 The result shall be<\/strong><br \/> \u00a0 _=Base<br \/> \u00a0 (A) (812)_10\u00a0\u00a0 (B) (-12)_10<br \/> \u00a0 (C) (12)_10\u00a0\u00a0\u00a0 (D) (-812)_10<br \/> \u00a0<br \/> <strong>\u00a0Ans: A<br \/> \u00a0<br \/> Q.39\u00a0 The circuit converting binary data in to decimal is<\/strong><br \/> \u00a0(A) Encoder\u00a0 (B) Multiplexer<br \/> \u00a0(C) Decoder\u00a0 (D) Code converter<br \/> \u00a0<br \/> <strong>\u00a0Ans: D<br \/> \u00a0<br \/> Q.40\u00a0 A three input NOR gate gives logic high output only when<\/strong><br \/> \u00a0(A) one input is high\u00a0 (B) one input is low<br \/> \u00a0(C) two input are low\u00a0 (D) all input are high<br \/> \u00a0<br \/> <strong>\u00a0Ans: D<br \/> \u00a0<br \/> Q.41 n bits in operation code imply that there are ___________ possible distinct operators<br \/> <em>\u00a0\u00a0 ^=Raised to<\/em><\/strong><br \/> \u00a0\u00a0 (A) 2n\u00a0 (B) 2^n<br \/> \u00a0\u00a0 (C) n\/2\u00a0 (D) n^2<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> Q.42\u00a0\u00a0 _________ register keeps tracks of the instructions stored in program stored in memory.<\/strong><br \/> \u00a0 (A) AR (Address Register)\u00a0 (B) XR (Index Register)<br \/> \u00a0 (C) PC (Program Counter)\u00a0\u00a0 (D) AC (Accumulator)<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: C<br \/> \u00a0<br \/> Q.43\u00a0\u00a0 Memory unit accessed by content is called<\/strong><br \/> \u00a0\u00a0 (A) Read only memory\u00a0 (B) Programmable Memory<br \/> \u00a0\u00a0 (C) Virtual Memory\u00a0\u00a0\u00a0 (D) Associative Memory<br \/> <strong>\u00a0<br \/> \u00a0\u00a0 Ans: D<br \/> \u00a0<br \/> Q.44\u00a0\u00a0 \u0393\u00c7\u00ffAging registers\u0393\u00c7\u00d6 are<\/strong><br \/> \u00a0\u00a0 (A) Counters which indicate how long ago their associated pages have been referenced.<br \/> \u00a0\u00a0 (B) Registers which keep track of when the program was last accessed.<br \/> \u00a0\u00a0 (C) Counters to keep track of last accessed instruction.<br \/> \u00a0\u00a0 (D) Counters to keep track of the latest data structures referred.<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.45\u00a0\u00a0 The instruction \u0393\u00c7\u00ffORG O\u0393\u00c7\u00d6 is a \u00a0<\/strong><br \/> \u00a0\u00a0 (A) Machine Instruction.\u00a0\u00a0\u00a0\u00a0 (B) Pseudo instruction.<br \/> \u00a0\u00a0 (C) High level instruction.\u00a0 (D) Memory instruction.<br \/> <strong>\u00a0\u00a0 Ans: B<\/strong><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Q.31\u00a0 Logic X-OR operation of (4ACO)_H &amp; (B53F)_H results _=Base \u00a0(A) AACB\u00a0 (B) 0000 \u00a0(C) FFFF\u00a0 (D) ABCD \u00a0 \u00a0Ans: C \u00a0 Q.32\u00a0 When CPU is executing a Program that is part of the Operating System, it is said to be in \u00a0(A) Interrupt mode\u00a0 (B) System mode \u00a0(C) Half mode\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (D) Simplex mode \u00a0&#8230;<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"footnotes":""},"categories":[18],"tags":[],"class_list":["post-192","post","type-post","status-publish","format-standard","hentry","category-computer-architecture-and-organization"],"_links":{"self":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts\/192","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=192"}],"version-history":[{"count":0,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts\/192\/revisions"}],"wp:attachment":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=192"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=192"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=192"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}