{"id":193,"date":"2020-04-05T07:06:26","date_gmt":"2020-04-05T07:06:26","guid":{"rendered":"https:\/\/temp.ashkerala.com\/?p=193"},"modified":"2020-04-05T07:06:26","modified_gmt":"2020-04-05T07:06:26","slug":"computer-organization-mcq-4","status":"publish","type":"post","link":"https:\/\/temp.ashkerala.com\/?p=193","title":{"rendered":"Computer Organization MCQ -4"},"content":{"rendered":"<p><strong>Q.46\u00a0\u00a0 Translation from symbolic program into Binary is done in<\/strong><br \/> \u00a0\u00a0 (A) Two passes.\u00a0\u00a0\u00a0 (B) Directly<br \/> \u00a0\u00a0 (C) Three passes.\u00a0 (D) Four passes.<br \/> \u00a0 \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.47\u00a0\u00a0 A floating point number that has a O in the MSB of mantissa is said to have<\/strong><br \/> \u00a0\u00a0 (A) Overflow\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (B) Underflow<br \/> \u00a0\u00a0 (C) Important number\u00a0 (D) Undefined<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> Q.48\u00a0\u00a0 The BSA instruction is \u00a0<\/strong><br \/> (A) Branch and store accumulator<br \/> (B) Branch and save return address<br \/> (C) Branch and shift address<br \/> (D) Branch and show accumulator<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> <em>Q.49\u00a0\u00a0 State whether True or False.<\/em><\/strong><\/p>\n<p> <strong>(i)\u00a0 Arithmetic operations with fixed point numbers take longer time for execution\u00a0 as compared to with floating point numbers.<\/strong><br \/> <em>Ans: True.<\/em><br \/> \u00a0<br \/> <strong>(ii)\u00a0 An arithmetic shift left multiplies a signed binary number by 2.<\/strong><br \/> <em>Ans: False.<\/em><br \/> \u00a0<br \/> <strong>Q.50\u00a0\u00a0 Logic gates with a set of input and outputs is arrangement of \u00a0<\/strong><br \/> \u00a0\u00a0 (A) Combinational circuit\u00a0 (B) Logic circuit<br \/> \u00a0\u00a0 (C) Design circuits\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (D) Register<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.51\u00a0\u00a0 MIMD stands for<\/strong><br \/> (A) Multiple instruction multiple data<br \/> (B) Multiple instruction memory data<br \/> (C) Memory instruction multiple data<br \/> (D) Multiple information memory data<br \/> \u00a0<br \/> <strong>\u00a0 Ans: A<br \/> \u00a0<br \/> Q.52\u00a0\u00a0 A k-bit field can specify any one of \u00a0<br \/> <em>^= Raised to<\/em><\/strong><br \/> \u00a0\u00a0 (A) 3^k\u00a0 registers\u00a0 (B) 2^k registers<br \/> \u00a0\u00a0 (C) K^2\u00a0 registers\u00a0 (D) K^3 registers<br \/> \u00a0 \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> Q.53\u00a0\u00a0 The time interval between adjacent bits is called the <\/strong>\u00a0<br \/> \u00a0\u00a0 (A) Word-time\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (B) Bit-time<br \/> \u00a0\u00a0 (C) Turn around time\u00a0 (D) Slice time<br \/> \u00a0 \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> Q.54\u00a0\u00a0 A group of bits that tell the computer to perform a specific operation is known as<\/strong><br \/> \u00a0\u00a0 (A) Instruction code\u00a0 (B) Micro-operation<br \/> \u00a0\u00a0 (C) Accumulator\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (D) Register<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.55\u00a0\u00a0 The load instruction is mostly used to designate a transfer from memory to a processor register known as<\/strong><br \/> \u00a0\u00a0 (A) Accumulator\u00a0\u00a0\u00a0\u00a0\u00a0 (B) Instruction Register<br \/> \u00a0\u00a0 (C) Program counter\u00a0 (D) Memory address Register<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.56\u00a0\u00a0 The communication between the components in a microcomputer takes place via the address and \u00a0<\/strong><br \/> \u00a0\u00a0 (A) I\/O bus\u00a0\u00a0\u00a0\u00a0\u00a0 (B) Data bus<br \/> \u00a0\u00a0 (C) Address bus\u00a0 (D) Control lines<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> Q.57\u00a0\u00a0 An instruction pipeline can be implemented by means of <\/strong>\u00a0<br \/> \u00a0\u00a0 (A) LIFO buffer\u00a0 (B) FIFO buffer<br \/> \u00a0\u00a0 (C) Stack\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0\u00a0 (D) None of the above<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> Q.58\u00a0\u00a0 Data input command is just the opposite of a<\/strong><br \/> \u00a0\u00a0 (A) Test command\u00a0 (B) Control command<br \/> \u00a0\u00a0 (C) Data output\u00a0\u00a0 (D) Data channel<br \/> <strong>\u00a0<br \/> \u00a0\u00a0 Ans: C<br \/> \u00a0<br \/> Q.59\u00a0\u00a0 A microprogram sequencer<\/strong><br \/> \u00a0(A)\u00a0 generates the address of next micro instruction to be executed.<br \/> \u00a0(B)\u00a0 generates the control signals to execute a microinstruction.<br \/> \u00a0(C)\u00a0 sequentially averages all microinstructions in the control memory.<br \/> \u00a0(D)\u00a0 enables the efficient handling of a micro program subroutine.<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.60\u00a0\u00a0 A binary digit is called a<\/strong><br \/> \u00a0\u00a0 (A) Bit\u00a0\u00a0\u00a0\u00a0 (B) Byte<br \/> \u00a0\u00a0 (C) Number\u00a0 (D) Character<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<\/strong><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Q.46\u00a0\u00a0 Translation from symbolic program into Binary is done in \u00a0\u00a0 (A) Two passes.\u00a0\u00a0\u00a0 (B) Directly \u00a0\u00a0 (C) Three passes.\u00a0 (D) Four passes. \u00a0 \u00a0 \u00a0\u00a0 Ans: A \u00a0 Q.47\u00a0\u00a0 A floating point number that has a O in the MSB of mantissa is said to have \u00a0\u00a0 (A) Overflow\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (B) Underflow \u00a0\u00a0 (C) Important&#8230;<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"footnotes":""},"categories":[18],"tags":[],"class_list":["post-193","post","type-post","status-publish","format-standard","hentry","category-computer-architecture-and-organization"],"_links":{"self":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts\/193","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=193"}],"version-history":[{"count":0,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts\/193\/revisions"}],"wp:attachment":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=193"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=193"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=193"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}