{"id":194,"date":"2020-04-05T07:06:51","date_gmt":"2020-04-05T07:06:51","guid":{"rendered":"https:\/\/temp.ashkerala.com\/?p=194"},"modified":"2020-04-05T07:06:51","modified_gmt":"2020-04-05T07:06:51","slug":"computer-organization-mcq-5","status":"publish","type":"post","link":"https:\/\/temp.ashkerala.com\/?p=194","title":{"rendered":"Computer Organization MCQ -5"},"content":{"rendered":"<p><strong>Q.61\u00a0\u00a0 A flip-flop is a binary cell capable of storing information of \u00a0<\/strong><br \/> \u00a0\u00a0 (A) One bit\u00a0\u00a0 (B) Byte<br \/> \u00a0\u00a0 (C) Zero bit\u00a0 (D) Eight bit<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.62\u00a0\u00a0 The operation executed on data stored in registers is called<\/strong><br \/> \u00a0\u00a0 (A) Macro-operation\u00a0 (B) Micro-operation<br \/> \u00a0\u00a0 (C) Bit-operation\u00a0\u00a0\u00a0 (D) Byte-operation<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> Q.63\u00a0\u00a0 MRI indicates<\/strong><br \/> (A) Memory Reference Information.<br \/> (B) Memory Reference Instruction.<br \/> (C) Memory Registers Instruction.<br \/> (D) Memory Register information<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: B<br \/> \u00a0<br \/> Q.64\u00a0\u00a0 Self-contained sequence of instructions that performs a given computational task is called \u00a0<\/strong><br \/> \u00a0\u00a0 (A) Function\u00a0 (B) Procedure<br \/> \u00a0\u00a0 (C) Subroutine\u00a0 (D) Routine<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.65\u00a0\u00a0 Microinstructions are stored in control memory groups, with each group specifying a<\/strong><br \/> \u00a0\u00a0 (A) Routine\u00a0 (B) Subroutine<br \/> \u00a0\u00a0 (C) Vector\u00a0\u00a0 (D) Address<br \/> \u00a0<br \/> <strong>\u00a0\u00a0 Ans: A<br \/> \u00a0<br \/> Q.66\u00a0 An interface that provides a method for transferring binary information between internal storage and external devices is called<\/strong><br \/> \u00a0\u00a0 (A) I\/O interface\u00a0\u00a0\u00a0\u00a0 (B) Input interface<br \/> \u00a0\u00a0 (C) Output interface\u00a0 (D) I\/O bus<br \/> \u00a0<br \/> <strong>\u00a0 Ans: A<br \/> \u00a0<br \/> Q.67\u00a0 Status bit is also called<\/strong><br \/> \u00a0\u00a0 (A) Binary bit\u00a0 (B) Flag bit<br \/> \u00a0\u00a0 (C) Signed bit\u00a0 (D) Unsigned bit<br \/> \u00a0<br \/> <strong>\u00a0 Ans: B<br \/> \u00a0<br \/> Q.68\u00a0 An address in main memory is called<\/strong><br \/> \u00a0 (A) Physical address\u00a0 (B) Logical address<br \/> \u00a0 (C) Memory address\u00a0 (D) Word address<br \/> \u00a0<br \/> <strong>\u00a0 Ans: A<br \/> \u00a0<br \/> Q.69\u00a0\u00a0 If the value V(x) of the target operand is contained in the address field itself, the addressing mode is<\/strong><br \/> \u00a0(A) immediate.\u00a0 (B)\u00a0 direct.<br \/> \u00a0(C) indirect.\u00a0\u00a0 (D)\u00a0 implied.<br \/> \u00a0<br \/> <strong>\u00a0Ans: B<br \/> \u00a0<br \/> Q.70 (-27)_10 can be represented in a signed magnitude format and in a 1\u0393\u00c7\u00d6s complement format as<br \/> <em>_=Base<\/em><\/strong><br \/> \u00a0(A)\u00a0\u00a0 111011 &amp; 100100\u00a0\u00a0 (B)\u00a0 100100 &amp;\u00a0 111011<br \/> \u00a0(C)\u00a0\u00a0 011011 &amp; 100100\u00a0\u00a0 (D)\u00a0 100100 &amp; 011011<br \/> \u00a0<br \/> <strong>\u00a0Ans: A<br \/> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<br \/> Q.71\u00a0 The instructions which copy information from one location to another either in the processor\u0393\u00c7\u00d6s internal register set or in the external main memory are called<\/strong><br \/> \u00a0(A)\u00a0\u00a0\u00a0 Data transfer instructions.\u00a0 (B)\u00a0\u00a0\u00a0 Program control instructions.<br \/> \u00a0(C)\u00a0\u00a0\u00a0 Input-output instructions.\u00a0\u00a0 (D)\u00a0\u00a0\u00a0 Logical instructions.<br \/> \u00a0<br \/> <strong>\u00a0Ans: A<br \/> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<br \/> Q.72\u00a0\u00a0 A device\/circuit that goes through a predefined sequence of states upon the application of input pulses is called<\/strong><br \/> \u00a0(A) register\u00a0\u00a0\u00a0\u00a0\u00a0 (B) flip-flop<br \/> \u00a0(C) transistor.\u00a0\u00a0 (D) counter.<br \/> \u00a0<br \/> <strong>\u00a0Ans: D<br \/> \u00a0<br \/> Q.73\u00a0 The performance of cache memory is frequently measured in terms of a quantity called \u00a0<\/strong><br \/> \u00a0\u00a0 (A) Miss ratio.\u00a0\u00a0\u00a0\u00a0\u00a0 (B) Hit ratio.<br \/> \u00a0\u00a0 (C) Latency ratio.\u00a0\u00a0 (D) Read ratio.<br \/> <strong>\u00a0Ans: C<br \/> \u00a0<br \/> Q.74 The information available in a state table may be represented graphically in a \u00a0<\/strong><br \/> \u00a0(A) simple diagram.\u00a0\u00a0\u00a0 (B) state diagram.<br \/> \u00a0(C) complex diagram.\u00a0\u00a0 (D) data flow diagram.<br \/> <strong>\u00a0Ans: B<br \/> \u00a0<br \/> Q.75\u00a0 Content of the program counter is added to the address part of the instruction in order to obtain the effective address is called.<\/strong><br \/> \u00a0\u00a0 (A) relative address mode.\u00a0\u00a0 (B) index addressing mode.<br \/> \u00a0\u00a0 (C) register mode.\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (D) implied mode. \u00a0<br \/> \u00a0 \u00a0<br \/> <strong>Ans: A <\/strong><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Q.61\u00a0\u00a0 A flip-flop is a binary cell capable of storing information of \u00a0 \u00a0\u00a0 (A) One bit\u00a0\u00a0 (B) Byte \u00a0\u00a0 (C) Zero bit\u00a0 (D) Eight bit \u00a0 \u00a0\u00a0 Ans: A \u00a0 Q.62\u00a0\u00a0 The operation executed on data stored in registers is called \u00a0\u00a0 (A) Macro-operation\u00a0 (B) Micro-operation \u00a0\u00a0 (C) Bit-operation\u00a0\u00a0\u00a0 (D) Byte-operation \u00a0 \u00a0\u00a0 Ans:&#8230;<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"footnotes":""},"categories":[18],"tags":[],"class_list":["post-194","post","type-post","status-publish","format-standard","hentry","category-computer-architecture-and-organization"],"_links":{"self":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts\/194","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=194"}],"version-history":[{"count":0,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts\/194\/revisions"}],"wp:attachment":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=194"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=194"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=194"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}