{"id":4,"date":"2020-03-30T13:47:40","date_gmt":"2020-03-30T13:47:40","guid":{"rendered":"https:\/\/temp.ashkerala.com\/?p=4"},"modified":"2020-03-30T13:47:40","modified_gmt":"2020-03-30T13:47:40","slug":"computer-arithmetic-mcq-01","status":"publish","type":"post","link":"https:\/\/temp.ashkerala.com\/?p=4","title":{"rendered":"Computer Arithmetic MCQ-01"},"content":{"rendered":"

1) A shift register can be used for ?<\/strong>
a.\u00a0\u00a0 \u00a0Serial to parallel conversion
b.\u00a0\u00a0 \u00a0Parallel to serial conversion
c.\u00a0\u00a0 \u00a0Digital delay line
d.\u00a0\u00a0 \u00a0All of the above
e.\u00a0\u00a0 \u00a0None of the above
Answer = D<\/strong>
Explanation:Shift registers can have both parallel and serial inputs. These are often configured as serial – in – parallel- out or parallel – in – serial – out.<\/p>\n

2)\u00a0 Semiconductor memory is-<\/strong>
a.\u00a0\u00a0 \u00a0Somewhat large than the magnetic core memory
b.\u00a0\u00a0 \u00a0A non-volatile memory
c.\u00a0\u00a0 \u00a0Somewhat slower than magnetic core memory
d.\u00a0\u00a0 \u00a0All of above
e.\u00a0\u00a0 \u00a0None of these
Answer = B<\/strong>
Explanation: Semiconductor memory is an electronic storage device often used as computer memory. Examples of semiconductor memory is: ROM, flash memory,\u00a0 magnetoresistive random-access memory (MRAM)<\/p>\n

3) Which of the following is a universal gate\u00a0 ?<\/strong>
a.\u00a0\u00a0 \u00a0AND
b.\u00a0\u00a0 \u00a0EX-OR
c.\u00a0\u00a0 \u00a0OR
d.\u00a0\u00a0 \u00a0NAND<\/p>\n

Answer = D<\/strong><\/p>\n

4) The logic 1 in positive logic system is represented by ?\u00a0<\/strong> \u00a0
a.\u00a0\u00a0 \u00a0Zero voltage
b.\u00a0\u00a0 \u00a0Lower voltage level
c.\u00a0\u00a0 \u00a0Higher voltage level
d.\u00a0\u00a0 \u00a0Negative voltage
e.\u00a0\u00a0 \u00a0None of the above
Answer = C<\/strong>
Explanation:The logic 1 is represented by higher voltage while 0 is represented as low voltage.<\/p>\n

5) Which function -positive logic is equivalent to OR function in negative logic?<\/strong>
a.\u00a0\u00a0 \u00a0NOT
b.\u00a0\u00a0 \u00a0OR
c.\u00a0\u00a0 \u00a0AND
d.\u00a0\u00a0 \u00a0NOR
e.\u00a0\u00a0 \u00a0None of the above
Answer = C<\/strong>
Explanation: AND function performs performs as OR in negative logic.<\/p>\n

\u00a06) Which of the following logic expressions is wrong ?<\/strong>
a.\u00a0\u00a0 \u00a01+0=1
b.\u00a0\u00a0 \u00a01+1=0
c.\u00a0\u00a0 \u00a01+0+1=1
d.\u00a0\u00a0 \u00a0 1+1+1=1
e.\u00a0\u00a0 \u00a0None of the above \u00a0
Answer = C<\/strong>
Explanation: 1+0 = 1 again this result is added to 1 as 1+1 which is equal to 0 with carry 1 but not equal to 1.<\/p>\n

7)\u00a0 A Combination logic circuit that is used when it is desired to send data from two or more source through a single transmission line is known as-<\/strong>
a.\u00a0\u00a0 \u00a0Decoder
b.\u00a0\u00a0 \u00a0Encoder
c.\u00a0\u00a0 \u00a0Multiplexer
d.\u00a0\u00a0 \u00a0De multiplexer
e.\u00a0\u00a0 \u00a0None of the above
\u00a0Answer = C<\/p>\n

8)\u00a0 The m-bit parallel adder consists of-<\/strong>
a.\u00a0\u00a0 \u00a0(m+1) full adders
b.\u00a0\u00a0 \u00a0m\/2 full adders
c.\u00a0\u00a0 \u00a0m-1 full adders
d.\u00a0\u00a0 \u00a0m full adders
e.\u00a0\u00a0 \u00a0None of the above
Answer = D
\u00a0
9)\u00a0 A logic circuit which is used to change a BCD number into an equivalent decimal number is- \u00a0<\/strong>
a.\u00a0\u00a0 \u00a0Decoder
b.\u00a0\u00a0 \u00a0Encoder
c.\u00a0\u00a0 \u00a0Multiplexer
d.\u00a0\u00a0 \u00a0Code converter
e.\u00a0\u00a0 \u00a0None of the above \u00a0
Answer = A<\/strong>
Explanation:Decoder is used to convert the BCD numbers into decimal.<\/p>\n

10) Which of the following property is true in context of Well Formed Formula(WFF)\u00a0 ?<\/strong>
a.\u00a0\u00a0 \u00a0Each letter is a term
b.\u00a0\u00a0 \u00a0If x and y are terms then x = y is a formula
c.\u00a0\u00a0 \u00a0If P is a formula then 7p is a formula
d.\u00a0\u00a0 \u00a0All of above
Answer = B\u00a0 \u00a0<\/p>\n

11) The term sum – of – product in Boolean algebra means ?<\/strong>
a.\u00a0\u00a0 \u00a0The AND function of several OR functions
b.\u00a0\u00a0 \u00a0The OR function of several AND functions
c.\u00a0\u00a0 \u00a0The OR function of several OR function
d.\u00a0\u00a0 \u00a0The AND function of several AND functions
\u00a0
Answer = B<\/strong>
Explanation: Sum-Of-Products expressions lend themselves well to implementation as a set of AND gates (products) feeding into a single OR gate (sum).<\/p>\n

12) The fan out capability of a digital building block can be defined as ?<\/strong>
a.\u00a0\u00a0 \u00a0The number of inputs that one output can transmit to
b.\u00a0\u00a0 \u00a0The amount of cooling required for fanning the hear out
c.\u00a0\u00a0 \u00a0The number of inputs that can transmit to one input
d.\u00a0\u00a0 \u00a0The maximum power dissipation that the unit can stand
e.\u00a0\u00a0 \u00a0None of above
Answer = A<\/p>\n

13) The ALE line of an 8085 microprocessor is used to\u00a0 ?<\/strong>
a.\u00a0\u00a0 \u00a0Execute an RST by hardware
b.\u00a0\u00a0 \u00a0Executes the instruction supplied by external device through the INTA signal
c.\u00a0\u00a0 \u00a0Executes an instruction from memory location 20 H
d.\u00a0\u00a0 \u00a0Executes a NOP
Answer = A<\/strong>
Explanation:\u00a0\u00a0 ALE is address latch enable. the lower order address remains only for a single T satate then ths data is latched and the lower order address bus stores the data.<\/p>\n

14) The cost for storing a bit is minimum in ?<\/strong>
a.\u00a0\u00a0 \u00a0Cache
b.\u00a0\u00a0 \u00a0Register
c.\u00a0\u00a0 \u00a0RAM
d.\u00a0\u00a0 \u00a0Magnetic tape
Answer = D<\/p>\n

15) The index register in a digital computer is used for\u00a0 ?<\/strong>
a.\u00a0\u00a0 \u00a0Pointing to the stack address
b.\u00a0\u00a0 \u00a0Indirect addressing
c.\u00a0\u00a0 \u00a0Keeping track of number of times a loop is executed
d.\u00a0\u00a0 \u00a0Address modification
Answer = D<\/strong>
Explanation: An index register in a computer’s CPU is a processor register used for modifying operand addresses during the run of a program, typically for doing vector\/array operations.<\/p>\n

16) After reset the CPU begins execution from the memory location ?<\/strong>
a.\u00a0\u00a0 \u00a00000H
b.\u00a0\u00a0 \u00a00001H
c.\u00a0\u00a0 \u00a0FFEFH
d.\u00a0\u00a0 \u00a08000H
Answer = A<\/p>\n

17) A single register to clear the lower four bits of the accumulator in 8085 assembly language is ?<\/strong>
a.\u00a0\u00a0 \u00a0XRI 0FH
b.\u00a0\u00a0 \u00a0ANI FOH
c.\u00a0\u00a0 \u00a0XRI FOH
d.\u00a0\u00a0 \u00a0ANI OFH<\/p>\n

Answer = B<\/strong>
Explanation: ANI FOH ANDs the accumulator with immediate. F leaves the high nibble whatever it is, 0 clears the lower nibble<\/p>\n

18) If the total number of states in the fetching and execution phases of an 8085 instruction is known to be 7; the number of machine cycles is\u00a0 ?<\/strong>
a.\u00a0\u00a0 \u00a00
b.\u00a0\u00a0 \u00a01
c.\u00a0\u00a0 \u00a02
d.\u00a0\u00a0 \u00a03
Answer = C<\/strong><\/p>\n

19) Von Neumann architecture is ?<\/strong>
a.\u00a0\u00a0 \u00a0SISD
b.\u00a0\u00a0 \u00a0SIMD
c.\u00a0\u00a0 \u00a0MIMD
d.\u00a0\u00a0 \u00a0MISD
Answer = A<\/strong>
Explanation:\u00a0 In computing, SISD (single instruction, single data) is a term referring to a computer architecture in which a single processor, a uniprocessor, executes a single instruction stream, to operate on data stored in a single memory. This corresponds to the von Neumann architecture.<\/p>\n

20) A typical application of MIMD is?<\/strong>
a.\u00a0\u00a0 \u00a0railway reservation
b.\u00a0\u00a0 \u00a0weather forecasting
c.\u00a0\u00a0 \u00a0matrix multiplication
d.\u00a0\u00a0 \u00a0All of above
\u00a0
Answer = A<\/strong>
Explanation: MIMD (multiple instruction, multiple data) is a technique employed to achieve parallelism.<\/p>\n","protected":false},"excerpt":{"rendered":"

1) A shift register can be used for ? a.\u00a0\u00a0 \u00a0Serial to parallel conversion b.\u00a0\u00a0 \u00a0Parallel to serial conversion c.\u00a0\u00a0 \u00a0Digital delay line d.\u00a0\u00a0 \u00a0All of the above e.\u00a0\u00a0 \u00a0None of the above Answer = D Explanation:Shift registers can have both parallel and serial inputs. These are often configured as serial – in – parallel-…<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"footnotes":""},"categories":[6],"tags":[],"class_list":["post-4","post","type-post","status-publish","format-standard","hentry","category-ugc-computer"],"_links":{"self":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts\/4","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=4"}],"version-history":[{"count":0,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=\/wp\/v2\/posts\/4\/revisions"}],"wp:attachment":[{"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=4"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=4"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/temp.ashkerala.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=4"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}